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ADM1041
Description
Bit No.
Name
Bit
Bit
Bit
Option
To set DC_OK polarity,
see polDC_OK.
0
1
0
+ve ov iopin < 1.15 V
0
0
0
+ve ov iopin > 1.25 V
1
1
0
0
1
1
+ve uv iopin < 1.25 V
0
0
1
+ve uv iopin > 1.35 V
1
0
0
1
0
0
?ve ov iopin < 1.25 V
0
1
0
?ve ov iopin > 1.35 V
1
0
0
1
0
1
?ve uv iopin < 1.15 V
0
0
0
?ve uv iopin > 1.25 V
1
0
1
1
1
0
flag iopin < 1.15 V
0
0
0
flag iopin > 1.25 V
1
0
0
1
1
1
flag iopin < 1.15 V
1
0
0
flag iopin > 1.25 V
0
0
0
Option: V REF /AC_OK/MON5.
4–2
mn5s2
b4
b3
b2
flag
ov
uv
mn5s1
mn5s0
0
0
0
0
0
1
0
1
0
iopin = AC_OK
iopin = AC_OK
iopin = AC_OK
To set AC_OK polarity,
0
see polDC_OK.
0
1
0
+ve ov iopin < vdac
0
0
+ve ov iopin > vdac
1
1
0
0
1
1
+ve uv iopin < vdac
0
0
1
+ve uv iopin > vdac
1
0
0
1
0
0
?ve ov iopin < vdac
0
1
0
?ve ov iopin > vdac
1
0
1
?ve uv iopin < vdac
0
0
0
?ve uv iopin > vdac
1
1
0
flag iopin < vdac
0
0
0
flag iopin > vdac
1
0
0
1
1
1
2.5 V ref out
AC sense source.
2
acss
b2
Source
0
1
AC_OK from AC SENSE 1
AC_OK from AC SENSE 2
PSON delay/debounce time.
1–0
psonts1
psonts0
b1
0
b2
0
Period
80 ms
0
1
1
1
0
1
0 ms
40 ms
160 ms
DC_OK on delay.
Delay time from dc outputs
being enabled to DC_OK
being asserted.
1–0
pokts1
pokts0
b1
0
0
1
b0
0
1
0
Period
400 ms
200 ms
800 ms
1
1
1600 ms
DC_OK off delay.
Delay time from PSON
forcingDC_OK to be
deasserted to PEN being
deasserted.
7–6
pots1
pots0
b7
0
0
1
1
b6
0
1
0
1
period
2 ms
0 ms
1 ms
4 ms
Rev. A | Page 58 of 64
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